1. Field of the Invention
The invention relates to an electrostatic discharge (ESD) protection device and method thereof. More particularly, the invention relates to an ESD protection device capable of adjusting a holding voltage and a triggering voltage of a discharge path, and a method thereof.
2. Description of Related Art
Electrostatic discharge (ESD) is a phenomenon of releasing electrostatic charges from non-conductive objects. The phenomenon brings about damages to semiconductors and other circuits in integrated circuits. When a normal charged body (human beings walking on carpets, machines in package integrated circuits, or instrument for testing integrated circuits) comes into contact with an IC chip, the ESD occurs, which leads to a transient power surge that may damage the integrated circuits in chips irreparably.
In order to prevent damages caused by the ESD, ESD protection devices are designed and applied to the integrated circuits. There are various traditional designs of the ESD protection devices. One of them is the application of two n-type transistors connected in series for ESD protection. The bias voltage at the gates of the two-level n-type transistors stays constant. Nonetheless, a holding voltage of a discharge path is oftentimes less than 10.5 volts under the aforesaid structure. Hence, when an inner circuit operates, electrical overstress (EOS) frequently occurs due to the overly low holding voltage, which negatively affects operation of the inner circuit.
As a result, to properly design and form the ESD protection device without affecting normal operation of the inner circuit has become the main focus in the industry.